ELPM-S3LW / Wake architecture
Designing deterministic wake-up.
How we prepare and verify this contentA power-latched node returns through a full boot. Reliability requires every wake source to have a defined priority, duration and electrical state; firmware must reconstruct state, complete its work and remove power only after preserving what matters.
Wake-up is a hardware function.
With the main rails removed, the microcontroller cannot sample an input. An external element must remain active: the RV-3028-C7 RTC for scheduled events or a detection path for an external edge. ELPM-S3LW exposes gate, wake and force-on; their logic has to be designed together with the sensor and carrier board.
| Source | Suitable for | Critical check |
|---|---|---|
| RTC | Periodic sampling | Alarm cleared and rescheduled |
| External edge | Asynchronous events | Pulse width and bounce |
| Force-on | Production and maintenance | No permanent assertion |
Boot must know why it started.
A robust sequence is: stabilize supplies, read and retain the cause, initialize only the required peripherals, perform sensing or communication, save persistent state, schedule the next event and finally release the latch. This order prevents losing the wake cause or switching off before a write completes.
Firmware should be idempotent: after an unexpected reset it must be able to repeat an operation without duplicating counters, packets or commands. A small record containing a version, sequence number and checksum is often safer than saving the whole application state.
Design for simultaneous events too.
An RTC alarm can coincide with an external edge; an input can remain asserted while power is removed; a transmission can fail while the next alarm is already close. Define priority, bound retries and ensure at least one path always reaches controlled shutdown.
Every powered state needs an exit. Do not use an infinite firmware wait as recovery. Timeouts, watchdogs and persistent counters should bound every phase that can hold the latch.
Test waveforms and persistent state together.
- Measure delay from wake source to stable rails.
- Generate short pulses, bounce and simultaneous events.
- Interrupt power during each persistent write.
- Verify minimum battery voltage, temperature and worst-case boot times.
- Record current and duration for the complete cycle, not only Deep Stop.
Review ELPM-S3LW pins, RTC and power architecture.
ELPM-S3LW