Four circuits for sensors that use very little energy.

N54LW is not a smaller S3LW.

The two modules share their format and power-management philosophy, but solve different problems. ELPM-S3LW uses the ESP32-S3 when greater compute capability, Wi-Fi, IP throughput and a broad firmware ecosystem are required. ELPM-N54LW omits Wi-Fi and provides fewer compute resources, but its nRF54L15 is designed for always-ready sensors, few-microamp idle and highly efficient Bluetooth LE transmission.

Four projects, from first power-up to an autonomous node.

Each folder includes a KiCad project, schematic and PCB, library tables, the ELPM-N54LW v1.0 symbol and footprint, and its STEP model. The four examples expose SWDIO and SWCLK for Nordic debugging and add power management one step at a time.

01 / Direct 3.3 V supply

It bypasses the power latch and keeps the module on. This is the simplest circuit for bring-up, SWD programming, firmware development and interface verification. Optional 0 Ω links help isolate domains and manage DNP variants.

02 / Battery power latch

It introduces VBAT and the switched P_DRAIN output. Sensors, reed contacts or Hall sensors can drive MASTER; WAKE accepts a compatible secondary source. Circuits that must detect events while the system is off remain on VBAT, while loads used only during measurement and transmission belong on the switched domain.

03 / RTC periodic wake-up

It keeps VRTC supplied from the battery to retain time and alarms while other rails are off. This is a foundation for beacons, data loggers and sensors that wake on a schedule, transmit over BLE or LoRa and then release the latch.

04 / Sensor node

It completes the example with an SDA/SCL bus and an INT line for an external sensor. The pattern is reusable: an always-on sensor detects the event, INT starts the latch, N54LW performs the essential measurement and processing, sends the data over the most suitable radio and returns to its minimum-power state.

Minimum energy begins with separated power domains.

With the power latch, the microcontroller does not merely remain asleep: the main rails can be physically disconnected. MASTER or WAKE begins the cycle; firmware takes control, identifies the cause, performs the work, saves state and releases the latch. VBAT supplies sources that must remain alert, VRTC retains the clock and P_DRAIN supplies circuitry needed only during the active cycle.

1. An always-powered source detects an event or the RTC reaches its alarm.
2. MASTER or WAKE activates the power latch and enables the switched rails.
3. The nRF54L15 boots, reads the cause and initialises only what is needed.
4. The node measures and makes a low-energy BLE transmission or uses the SX1262 for long range.
5. Firmware clears the source, prepares the next wake and releases the latch.

Low voltage is a system advantage, not a single number.

N54LW enables architectures closer to the native voltages of modern sensors and storage devices. The SX1262 VSUB rail accepts 1.8 to 3.7 V, while the main N54LW rail requires at least 2.0 V. S3LW instead requires at least 3.0 V at its input and uses a dedicated 3.3 V LoRa rail. This difference can avoid unnecessary conversion, but every domain must be checked separately.

The real benefit depends on the complete chain: battery discharge curve, sensor minimum voltage, protection drops, radio peaks, converter efficiency and reverse currents. A rail compatible with 1.8 V does not automatically mean the complete product operates down to 1.8 V.

Start from the circuit closest to your use case.

• Use the direct-supply project for bring-up and firmware debugging.
• Move to the power-latch project once wake source and power domains are defined.
• Add VRTC only when continuous time or scheduled events are required.
• Size the always-on budget including sensor, pull-ups, RTC and leakage.
• Verify minimum voltage, BLE/LoRa peaks, persistent interrupts and shutdown after every firmware error.

The files are editable reference designs, not automatic certification of the final product. Always check module revision, datasheet, antenna, RF layout, power supply and firmware behaviour on the complete prototype.